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--vhdl code for signed multiplier using functions:


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity signedmultiplier is
generic(n:integer:=4);
port (a,b :in std_logic_vector(n downto 0);
sgm:out std_logic_vector((n*n) downto 0));
end signedmultiplier;

architecture Behavioral of signedmultiplier is
function conv(m:std_logic_vector)
return integer is
variable x:integer;
begin 
x:=0;
for i in 0 to n loop
if(m(i)='1') then
x:=x+(2**i);
end if;
end loop;
if(m(3)='1')then
x:=(2**4)-x;
end if;
return x;
end conv;
function reconv(j:integer)
return std_logic_vector is
variable y:std_logic_vector((n*n) downto 0):=(others=>'0');
variable l:integer:=0;
begin
l:=j;
while (l>0) loop
for i in ((n*n)-1) downto 0 loop
if(l>=2**i) then
y(i):='1';
l:=l-2**i;
exit;
end if;
end loop;
end loop;
return y;
end reconv;

begin
process(a,b)
variable u,v,t,z,s:integer:=0;
variable c:std_logic:='0';
variable w:std_logic_vector((n*n) downto 0):=(others=>'0');
begin
u:=conv(a);
v:=conv(b);
z:=u*v;
w:=reconv(z);
c:=a(n) xor b(n);
--t:=z;
if(c='1') then
w(n*n):='1';
s:=2**(n*n);
for i in ((n*n)-1) downto 0 loop
t:=s-(2**i);
if(t>=z) then
s:=t;
w(i):='1';
else
w(i):='0';
end if;
end loop;
end if;
sgm<=w;
end process;
end Behavioral;



library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.std_logic_arith.all;
entity datatransmitter is
port(data:in std_logic_vector(6 downto 0);
clk,data_ready:in std_logic;
dout:out std_logic);
end datatransmitter;

architecture Behavioral of datatransmitter is
begin
process(clk,data_ready)
variable x:std_logic_vector(9 downto 0);
variable y:std_logic;
begin
y:=data(0)xor data(1)xor data(2)xor data(3)xor data(4)xor data(5)xor data(6);
if(data_ready='0') then
dout<='0';
x:='1'&data&y&'1';
elsif(clk' event and clk='1') then
dout<=x(9);
x:=x(8 downto 0)&'0';
end if;
end process;
end Behavioral;



The above code has been executed and has been found to have no errors..!  
plz do comment..!
thank u..!! :) :)