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Showing posts with label 1's. Show all posts
Showing posts with label 1's. Show all posts


--code for counting no of 1's using loop method:

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity onesusingloop is
 port(d:in std_logic_vector(9 downto 0);
 count:out integer);
 end onesusingloop;

 architecture beh of onesusingloop is
 begin
 process(d)
 variable x:integer;
 begin
 x:=0;
 for i in 0 to 9 loop
 if(d(i)='1')then
 x:=x+1;
 end if;
 end loop;
 count<=x;
 end process;
 end beh;

The above code has been executed and has been found to have no errors..!  
plz do comment..!
thank u..!! :) :)


--vhdl code for counting number of one's using structural style:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity noof1 is
port(a:in std_logic_vector(4 downto 0);
count:out integer);
end noof1;

architecture structural of noof1 is
signal b,c,d,x:integer;
begin
with a(0) select
count<=x+1 when '1',
       x when others;
with a(1) select
  x<=b+1 when '1',
      b when others;
with a(2) select  
b<= c+1 when '1',
   c when others;
with a(3) select  
   c<= d+1 when '1',
    d when others;
with a(4) select
d<= 1 when '1',
    0 when others;
end structural;

The above code has been executed and has been found to have no errors..!  plz do comment..!thank u..!! :) :)

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